You Can Read Machine Code. So Why Does Your Kernel Still Stall?
Understanding GPU instructions is only the beginning. You know how to read disassembly, follow register allocation, and navigate the memory hierarchy. Yet your tensor cores remain underutilized, profiler reports reveal unfamiliar stall reasons, and a hand-built asynchronous pipeline hangs without an obvious explanation.
This is where GPU performance engineering becomes serious.
Who Is This Book For?
This volume is written for readers who have completed Book 1 or possess equivalent hands-on GPU programming experience. It is ideal for performance engineers, kernel developers, compiler specialists, and researchers ready to progress from understanding machine instructions to engineering complete, high-performance GPU systems.
What You Will Learn in This Second Volume
How to design shared memory layouts that minimize bank conflicts and use swizzling effectively.How to overlap data movement and computation using hardware copy engines, multi-stage pipelines, and synchronization barriers.How memory ordering works, including scopes, fences, and atomics, for building reliable lock-free and cross-block algorithms.How to trace performance stalls to individual instructions and distinguish compute limitations, memory bottlenecks, and latency problems.How to diagnose hangs, incorrect results, and compiler-induced performance regressions at the instruction level.How multi-device systems communicate and how GPU clocks and power management influence benchmark results.How to approach five complete engineering case studies, including failed attempts, debugging decisions, and final implementations.Why This Book Is Different
Every major technique is demonstrated through working programs, exact correctness tests, and repeatable measurements you can perform on your own hardware. You will learn how to investigate problems systematically, validate solutions, and make performance decisions based on evidence rather than assumptions.
The book also includes valuable reference material covering instruction tables, architectural limits, and toolchain commands, giving you a practical resource beyond the initial reading.
A Note on the Two-Volume Series
This is Book 2 of a two-volume series. It builds directly on Book 1, which covers GPU architecture, instruction sets, execution, registers, scheduling, and the memory hierarchy. The foundational knowledge from Book 1 is assumed rather than repeated.
If you are ready to move beyond understanding GPU machine code and start engineering reliable, optimized, high-performance kernels, this volume takes you further.
Stop guessing at performance. Find the bottleneck, prove the solution, and build better GPU systems.