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Design and Test Strategies for 2d/3D Integratio... 3030313093 Book Cover

Design and Test Strategies for 2d/3D Integratio...

Edition Description

This book covers various aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems. It gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling for NoC-based multicores. The authors...

Edition Details
Format:Hardcover
Language:English
ISBN:3030313093
Format: Hardcover
Condition:
$
59.29
50 Available
Design and Test Strategies for 2d/3D Integratio... 3030313123 Book Cover

Design and Test Strategies for 2d/3D Integratio...

Edition Description

Introduction to Network-on-Chip Designs and Tests.- Iterative Mapping with Through Silicon Via (TSV) placement for 3D-NoC-based multicore systems.- A constructive Heuristic for integrated mapping and TSV Placement for 3D-NoC-based multicore systems.- Discrete Particle Swarm...

Edition Details
Format:Paperback
Language:English
ISBN:3030313123
Format: Paperback
Condition:
$
59.29
50 Available
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