Design and Test Strategies for 2d/3D Integration for Noc-Based Multicore Architectures

by Kanchan Manna and Jimson Mathew

Book Overview

Introduction to Network-on-Chip Designs and Tests.- Iterative Mapping with Through Silicon Via (TSV) placement for 3D-NoC-based multicore systems.- A constructive Heuristic for integrated mapping and TSV Placement for 3D-NoC-based multicore systems.- Discrete Particle Swarm Optimization for integrated mapping and TSV Placement for 3D-NoC-based multicore systems.- Temperature-aware application mapping strategy for 2D-NoC-based multicore systems.-...

• Format: Paperback
• Language: English
• ISBN: 3030313123
• ISBN13: 9783030313128
• Release Date: January 2021
• Publisher: Springer
• Length: 162 Pages
• Weight: 0.56 lbs.
• Dimensions: 0.4" x 6.1" x 9.2"