Verilog Styles for Synthesis of Digital Systems

By David R. Smith

This book is designed specifically to make the cutting-edge techniques of digital hardware design more accessible to those just entering the field. The text uses a simpler language (Verilog) and... This description may be from another edition of this product.

• Format: Paperback
• Language: English
• ISBN: 0201618605
• ISBN13: 9780201618600
• Release Date: December 2019
• Publisher: Pearson
• Length: 336 Pages
• Weight: 1.54 lbs.
• Dimensions: 0.8" x 7.0" x 9.3"

Customer Reviews

Excellent book

This book very concisely explains how to synthesizable verilog code. A beginner with no idea of HDL concepts might get overwhelmed. I would recommend beginners to start with Verilog HDL by Samir Palnitkar and then move on to this book. Definitely a must have.

Excellent Treatment of Verilog and PLD Methodology

I have been a user of VHDL for the last three years and am now beginning to use Verilog, mostly because I am now doing ASIC development. For the new Verilog user, this book is excellent because it covers the gamut for an HDL and FPGA designer -- the syntax of the language,the difference between structural and behavioral constructs, simulation, hierarchical design, and of course the ubiqituous State Machine. Also included are some sections on targeting different types of technology, including standard cell. I found this book quite useful compared to other Verilog books I have purchased.

One of the Best Verilog books to learn from

I have been searching for an Verilog book that will allow me to get up to speed quickly for an particular project. I wanted something that presented the syntax of the language in an clear manner but more importantly would give me an methodology to allow me to use Verilog in the design of an FPGA. This book seems to have "the right stuff". This book along with "Verilog HDL" by Samir Palnitkar seem to be the best that I have seen for learning Verilog