Reuse Methodology Manual for System-On-A-Chip Designs

By Pierre Bricaud and Michael Keating

Book Overview

This updated and revised book outlines a set of best practices for creating reusable designs for use in a SoC design methodology. It provides a chronicle of "best practices". These practices are based on the authors' experience in developing reusable designs, as well as the experience of design teams in many companies around the world. There is emphasis on hard IP and physical design. Silicon and tool technologies move so quickly that many of the details of design-for-reuse will undoubtedly continue to evolve over time. But the fundamental aspects of the methodology described in this book have become widely adopted and are likely to form the foundation of chip design for some time to come.

• Format: Paperback
• Language: English
• ISBN: 0387740988
• ISBN13: 9780387740980
• Release Date: September 2007
• Publisher: Springer
• Length: 292 Pages
• Weight: 0.97 lbs.
• Dimensions: 0.7" x 6.1" x 9.2"

Customer Reviews

Very useful in practice

This book pointed out many design problems that I just met before. Designer could avoid many of them by following the guidelines in this book. I think it would help me a lot in my design work. Thanks to the authors.

Recommend it to every designer as a handbook

The guidelines are not difficult to understand, and you may have the pieces here and there. But this book has a broad coverage. I got this book by luck draw at SNUG. Didn't pay attention at first until I read it. Very well organized, very accurate description of the real feelings of doing a real chip. The methodology it talks about is not limited to "reuse". I suggest the auther change the title for next edition.

Great baseline text for VLSI designers of all stripes

I really liked this book and found its rules and guidelines very useful. Many of the guidelines are common sense, but it is still very appropriate to have them codified in a single textbook. Practitioners of full-custom approaches to IC design will complain that this is an "ASIC" book. It does have some rules that folks from that background will find hard to swallow (eg, no latches, no gated clocks). But 70% of the book is still applicable to full custom design and will result in faster re-use of full custom cores. The book gets off to a fairly wooly start but becomes substantial with the RTL Coding Guidelines chapter. From then on, its really solid stuff. This is a good book for the times. With much discussion of design re-use and transferable intelectual property in the chip industry, it has all the hallmarks of becoming a 'bible' book for IC designers of all stripes.