On-Chip Training Npu - Algorithm, Architecture and Soc Design

Bys: Han, Donghyeon and Yoo, Hoi-Jun

Unlike most available sources that focus on deep neural network (DNN) inference, this book provides readers with a single-source reference on the needs, requirements, and challenges involved with on-device, DNN training semiconductor and SoC design. The authors include coverage of the trends and history surrounding the development of on-device DNN training, as well as on-device training semiconductors and SoC design examples to facilitate understanding.

• Format: Paperback
• Language: English
• ISBN: 3031342399
• ISBN13: 9783031342394
• Release Date: July 2024
• Publisher: Springer
• Length: 237 Pages