Morphological Image Processing: Architecture and VLSI Design

By Petrus Paulus Jonker

Summary Based on the experiences of past designs and the outcome of recent studies in the comparisons of low-level image processing architectures, a pipelined system for real- time low-image processing has been designed and realized in CMOS technology. To minimize design pitfalls, a study was performed to the details of the design solutions that have been found in embodimentsof the three main architectural groups of image processing; the Square Processor Arrays, the Linear Processor Arrays and the Pipelines. This is reflected in a theoretical model. As the design is based on bitplane-wise processing of images, research was performed on the principles ofCellularLogic Processing of two dimensional images. of binary A methodology has been developed that is based on the transformation images using sets of Hit-or-Miss masks. This method appeared to be extendable to higher dimensional images. A theoretical model for the generation of break-point conditions in high dimensional images has been developed, and applied up to dimension three.

• Format: Paperback
• Language: English
• ISBN: 9020127667
• ISBN13: 9789020127669
• Release Date: January 1993
• Publisher: Springer
• Length: 297 Pages
• Weight: 0.96 lbs.
• Dimensions: 0.7" x 6.1" x 9.2"