Modern Digital VLSI Design: RTL Design, Verification, Physical Design, AI-Driven EDA, and SoC Development for Industry Professionals

By Dr. Saumya Srivastava

The semiconductor industry stands at a remarkable inflection point. The relentless march of Moore's Law, while slowing in its classical form, has been reinvigorated by advanced packaging, chiplet architectures, and, most significantly for the purposes of this book, the deep integration of artificial intelligence into the electronic design automation (EDA) tools that engineers use every day. A digital design engineer entering the field today must be fluent not only in the timeless fundamentals of RTL coding, verification methodology, and physical design, but also in how machine learning is reshaping placement, routing, timing closure, and verification closure itself.
This book, Modern Digital VLSI Design, was written to bridge that gap. It is organized as a complete journey from a design specification to a taped-out, packaged, and tested chip, structured in seven parts: Foundations, RTL Design, Verification, Physical Design, AI-Driven EDA, SoC Development, and Industry Practice. Each part builds on the last, and each chapter is designed to be usable both as a sequential learning path for someone new to the field and as a standalone reference for a practicing engineer who needs to refresh a specific topic - clock domain crossing, UPF power intent, static timing analysis corners, or how a reinforcement-learning-based placer actually works - are examples of that kind of on-demand lookup.
The intended audience is broad by design: senior undergraduate and graduate students in electrical and computer engineering, RTL and verification engineers moving into physical design, physical design engineers who want to understand what verification and AI-EDA teams are doing upstream and downstream of their work, and engineering managers who need a working vocabulary across the entire flow. Where possible, each chapter includes original figures, comparison tables, coding examples, and worked illustrations rather than reproducing vendor-specific screenshots, so that the concepts remain durable even as specific tool user interfaces change from release to release.
A note on scope and currency: EDA tools, process nodes, and AI methodologies evolve quickly. This text focuses on the underlying engineering principles - the physics of the MOSFET, the mathematics of static timing analysis, the architecture of a UVM testbench, the mechanics of a machine-learning-guided placer - that remain valid across tool generations. Specific vendor tool names are used for illustration and orientation, not as an endorsement or as the sole way to accomplish a task; readers should always consult current vendor documentation for command syntax and feature availability.
I am grateful to the generations of VLSI engineers, researchers, and standards bodies (IEEE, Accellera, and the major EDA vendors) whose published work forms the intellectual foundation this book draws upon and synthesizes. It is my hope that this book serves as a reliable companion on your journey - whether that journey is a semester-long course, a transition into a new specialization, or a daily reference sitting beside your terminal.

• Format: Paperback
• Language: English
• ISBN: B0HC2NVWS7
• ISBN13: 9798189680786
• Release Date: July 2026
• Publisher: Independently Published
• Length: 284 Pages
• Weight: 0.84 lbs.
• Dimensions: 0.6" x 6.0" x 9.0"