Logical Effort: Designing Fast CMOS Circuits

by Ivan Sutherland, David Money Harris, Robert F. Sproull, et al.

Book Overview

Designers of high-speed integrated circuits face a bewildering array of choices and too often spend frustrating days tweaking gates to meet speed targets. Logical Effort: Designing Fast CMOS Circuits makes high speed design easier and more methodical, providing a simple and broadly applicable method for estimating the delay resulting from factors such as topology, capacitance, and gate sizes.

The brainchild of circuit and computer graphics...

• Format: Paperback
• Language: English
• ISBN: 1558605576
• ISBN13: 9781558605572
• Release Date: February 1999
• Publisher: Morgan Kaufmann Publishers
• Length: 256 Pages
• Weight: 1.00 lbs.
• Dimensions: 0.4" x 7.4" x 9.2"