High-Level Verification: Methods and Tools for Verification of System-Level Designs

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High-Level Verification: Methods and Tools for ...

By Sorin Lerner, Rajesh K Gupta, Sudipta Kundu, et al.

Edition Description

Given the growing size and heterogeneity of Systems on Chip (SOC), the design process from initial specification to chip fabrication has become increasingly complex. This growing complexity provides incentive for designers to use high-level languages such as C, SystemC, and SystemVerilog...

Edition Details

Format:Paperback

Language:English

ISBN:149390101X

Format: Paperback

Condition:

109.99

Quantity:

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