Gate-tunable p-n heterojunction diode, and fabrication method and application of same: United States Patent 9972799

By: Hersam, Mark C.

A method of fabricating a diode includes forming a first semiconductor layer having a first portion and a second portion extending from the first portion on a substrate; forming first and second electrodes on the substrate, the first electrode extending over and being in contact with the first portion of the first semiconductor layer; forming an insulting film to cover the first electrode and the first portion of the first semiconductor layer; and forming a second semiconductor layer having a first portion and a second portion extending from the first portion on the substrate. The second portion of the second semiconductor layer overlapping with the second portion of the first semiconductor layer to define a vertically stacked heterojunction therewith. The first portion of the second semiconductor layer extending over and being in contact with the second electrode. Each of the first and second semiconductor layers includes an atomically thin semiconductor.

• Format: Paperback
• Language: English
• ISBN: B08RGXBFF6
• ISBN13: 9798584484941
• Release Date: January 1
• Publisher: Independently Published
• Length: 28 Pages
• Weight: 0.20 lbs.
• Dimensions: 0.1" x 8.5" x 11.0"