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Paperback FPGA Task Arrangement with Genetic Algorithms Book

ISBN: 3838622995

ISBN13: 9783838622996

FPGA Task Arrangement with Genetic Algorithms

Inhaltsangabe: Abstract: Two evolutionary approaches of allocating tasks onto a Field-Programmable Gate Array (FPGA) are presented. Offline task arrangement: whenever a set of tasks has to be arranged onto an FPGA in practice, one is interested in arranging a maximum number of tasks which efficiently utilize the FPGA area. A genetic algorithm is proposed searching for an arrangement of tasks offline, i.e. before the tasks are physically placed onto the FPGA. Online task arrangement: FPGAs that allow partial reconfiguration at run-time can be shared among multiple independent tasks. When the sequence of tasks to be performed is unpredictable the FPGA controller needs to make allocation decisions online. Since online allocation suffers from fragmentation, tasks can end up waiting despite there being sufficient, albeit non-contiguous resources available to service them. The time to complete tasks is consequently longer and the utilization of the FPGA is lower than it could be. A genetic algorithm is proposed rearranging a subset of the tasks executing on the FPGA when doing so allows the next pending task to be processed sooner. In comparison with other heuristic approaches a genetic algorithm is described and evaluated which overcomes the NP-hard problems of identifying feasible rearrangements and scheduling the rearrangements when moving tasks are reloaded from off-chip. Inhaltsverzeichnis: Table of Contents: 1.Introduction7 2.Field Programmable Gate Arrays9 2.1Architecture of FPGAs9 2.2Dynamically Reconfigurable FPGAs10 2.3Comparison with Related Devices11 2.4Creation of an FPGA Model11 3.FPGA Task Arrangement Problem18 3.1Static Task Arrangement Problem18 3.1.1Static Task Management18 3.1.2Problem Formulation20 3.2Dynamic Task Arrangement Problem21 3.2.1Dynamic Task Management21 3.2.2Search for an Admissible Task Rearrangement22 3.2.3Rearrangement Scheduling24 3.2.4Buffer Restriction27 3.2.5Problem Formulation30 4.Arrangement Concepts31 4.1Sh

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