Designing with Xilinx(r) FPGAs: Using Vivado

Chapter 1: State of the Art Programmable Logic 1
Chapter 2: Vivado Design Tools 17Chapter 3: IP Flows 23Chapter 4: Gigabit Transceivers 35Chapter 5: Memory Controllers 49Chapter 6: Processor Options 65Chapter 7: Vivado IP Integrator 75Chapter 8: SysGen for DSP 85Chapter 9: Synthesis 97Chapter 10: C Based Design 111Chapter 11: Simulation 127Chapter 12: Clocking 141Chapter 13: Stacked Silicon Interconnect (SSI) 155Chapter 14: Timing Closure 167Chapter 15: Power Analysis and Optimization 179Chapter 16: System Monitor 191Chapter 17: Hardware Debug 205Chapter 18: Emulation Using FPGAs 221Chapter 19: Partial Reconfiguration & Hierarchical Design 239

• Format: Paperback
• Language: English
• ISBN: 331982581X
• ISBN13: 9783319825816
• Release Date: July 2018
• Publisher: Springer
• Length: 260 Pages
• Weight: 0.85 lbs.
• Dimensions: 0.6" x 6.1" x 9.2"