Principles of Verifiable Rtl Design: A Functional Coding Style Supporting Verification Processes in Verilog

by Harry D. Foster and Lionel Bening

Book Overview

Explaining how you can write Verilog to describe chip designs at the RT-level in a manner that co-operates with verification processes, this text focuses on how this co-operation can return an order... This description may be from another edition of this product.

• Format: Paperback
• Language: English
• ISBN: 1475773137
• ISBN13: 9781475773132
• Release Date: April 2013
• Publisher: Springer
• Length: 253 Pages
• Weight: 0.85 lbs.
• Dimensions: 0.6" x 6.1" x 9.2"